Work Experience:

Location: Banglore
Sept, 2020 – Sept, 2025

Onsite: Banglore
Nov, 2020 – Sept, 2025
I am Aashish Ranjan, a Design Verification Engineer with 5+ years of experience in SoC/GPU/CPU Verificaiton Projects, specializing in SV, UVM, UVM RAL, RAS, and Register verification, ensuring innovation and reliable semiconductor solutions.
karmaṇy-evādhikāras te mā phaleṣhu kadāchana
mā karma-phala-hetur bhūr mā te saṅgo ’stvakarmaṇi

Location: Banglore
Sept, 2020 – Sept, 2025

Onsite: Banglore
Nov, 2020 – Sept, 2025
CONTACT: